Browse Source

integrate x86_64-asm.c into i386-asm.c

Also, disable 16bit support for now as it causes bugs
in 32bit mode.  #define I386_ASM_16 if you want it.
mob/mob_pipcet/mixed-structs
grischka 14 years ago
parent
commit
1308e8ebcf
  1. 4
      Makefile
  2. 616
      i386-asm.c
  3. 29
      i386-asm.h
  4. 13
      i386-gen.c
  5. 135
      i386-tok.h
  6. 16
      libtcc.c
  7. 24
      tcc.h
  8. 6
      tcctok.h
  9. 16
      win32/build-tcc.bat
  10. 1266
      x86_64-asm.c
  11. 15
      x86_64-gen.c
  12. 225
      x86_64-tok.h

4
Makefile

@ -82,9 +82,9 @@ CORE_FILES = tcc.c libtcc.c tccpp.c tccgen.c tccelf.c tccasm.c \
tcc.h config.h libtcc.h tcctok.h
I386_FILES = $(CORE_FILES) i386-gen.c i386-asm.c i386-asm.h i386-tok.h
WIN32_FILES = $(CORE_FILES) i386-gen.c i386-asm.c i386-asm.h i386-tok.h tccpe.c
WIN64_FILES = $(CORE_FILES) x86_64-gen.c x86_64-asm.c x86_64-asm.h x86_64-tok.h tccpe.c
WIN64_FILES = $(CORE_FILES) x86_64-gen.c i386-asm.c x86_64-asm.h tccpe.c
WINCE_FILES = $(CORE_FILES) arm-gen.c tccpe.c
X86_64_FILES = $(CORE_FILES) x86_64-gen.c x86_64-asm.c x86_64-asm.h x86_64-tok.h
X86_64_FILES = $(CORE_FILES) x86_64-gen.c i386-asm.c x86_64-asm.h
ARM_FILES = $(CORE_FILES) arm-gen.c
C67_FILES = $(CORE_FILES) c67-gen.c tcccoff.c

616
i386-asm.c

File diff suppressed because it is too large

29
i386-asm.h

@ -1,12 +1,12 @@
DEF_ASM_OP0(pusha, 0x60) /* must be first OP0 */
DEF_ASM_OP0(popa, 0x61)
DEF_ASM_OP0(clc, 0xf8)
DEF_ASM_OP0(clc, 0xf8) /* must be first OP0 */
DEF_ASM_OP0(cld, 0xfc)
DEF_ASM_OP0(cli, 0xfa)
DEF_ASM_OP0(clts, 0x0f06)
DEF_ASM_OP0(cmc, 0xf5)
DEF_ASM_OP0(lahf, 0x9f)
DEF_ASM_OP0(sahf, 0x9e)
DEF_ASM_OP0(pusha, 0x60)
DEF_ASM_OP0(popa, 0x61)
DEF_ASM_OP0(pushfl, 0x9c)
DEF_ASM_OP0(popfl, 0x9d)
DEF_ASM_OP0(pushf, 0x9c)
@ -74,12 +74,15 @@ ALT(DEF_ASM_OP2(btcw, 0x0fbb, 0, OPC_MODRM | OPC_WL, OPT_REGW, OPT_REGW | OPT_EA
ALT(DEF_ASM_OP2(btcw, 0x0fba, 7, OPC_MODRM | OPC_WL, OPT_IM8, OPT_REGW | OPT_EA))
/* prefixes */
DEF_ASM_OP0(addr16, 0x67)
#ifdef I386_ASM_16
DEF_ASM_OP0(a32, 0x67)
DEF_ASM_OP0(data16, 0x66)
DEF_ASM_OP0(o32, 0x66)
#else
DEF_ASM_OP0(aword, 0x67)
DEF_ASM_OP0(addr16, 0x67)
ALT(DEF_ASM_OP0(word, 0x66))
DEF_ASM_OP0(data16, 0x66)
#endif
DEF_ASM_OP0(lock, 0xf0)
DEF_ASM_OP0(rep, 0xf3)
DEF_ASM_OP0(repe, 0xf3)
@ -122,9 +125,9 @@ ALT(DEF_ASM_OP2(movzwl, 0x0fb7, 0, OPC_MODRM, OPT_REG16 | OPT_EA, OPT_REG32))
ALT(DEF_ASM_OP1(pushw, 0x50, 0, OPC_REG | OPC_WL, OPT_REGW))
ALT(DEF_ASM_OP1(pushw, 0xff, 6, OPC_MODRM | OPC_WL, OPT_REGW | OPT_EA))
ALT(DEF_ASM_OP1(pushw, 0x6a, 0, OPC_WL, OPT_IM8S))
ALT(DEF_ASM_OP1(pushw, 0x68, 0, OPC_WL, OPT_IM32))
ALT(DEF_ASM_OP1(pushw, 0x06, 0, OPC_WL, OPT_SEG))
DEF_ASM_OP1(pushb, 0x6a, 0, OPC_B, OPT_IM8S)
ALT(DEF_ASM_OP1(popw, 0x58, 0, OPC_REG | OPC_WL, OPT_REGW))
ALT(DEF_ASM_OP1(popw, 0x8f, 0, OPC_MODRM | OPC_WL, OPT_REGW | OPT_EA))
@ -203,7 +206,9 @@ ALT(DEF_ASM_OP1(call, 0xff, 2, OPC_MODRM, OPT_INDIR))
ALT(DEF_ASM_OP1(call, 0xe8, 0, OPC_JMP, OPT_ADDR))
ALT(DEF_ASM_OP1(jmp, 0xff, 4, OPC_MODRM, OPT_INDIR))
ALT(DEF_ASM_OP1(jmp, 0xeb, 0, OPC_SHORTJMP | OPC_JMP, OPT_ADDR))
#ifdef I386_ASM_16
ALT(DEF_ASM_OP1(jmp, 0xff, 0, OPC_JMP | OPC_WL, OPT_REGW))
#endif
ALT(DEF_ASM_OP2(lcall, 0x9a, 0, 0, OPT_IM16, OPT_IM32))
ALT(DEF_ASM_OP1(lcall, 0xff, 3, 0, OPT_EA))
@ -353,8 +358,10 @@ ALT(DEF_ASM_OP2(lslw, 0x0f03, 0, OPC_MODRM | OPC_WL, OPT_EA | OPT_REG, OPT_REG))
DEF_ASM_OP1(verr, 0x0f00, 4, OPC_MODRM, OPT_REG | OPT_EA)
DEF_ASM_OP1(verw, 0x0f00, 5, OPC_MODRM, OPT_REG | OPT_EA)
#ifdef I386_ASM_16
/* 386 */
DEF_ASM_OP0(loadall386, 0x0f07)
#endif
/* 486 */
DEF_ASM_OP1(bswap, 0x0fc8, 0, OPC_REG, OPT_REG32 )
@ -369,7 +376,8 @@ ALT(DEF_ASM_OP2(cmpxchgb, 0x0fb0, 0, OPC_MODRM | OPC_BWL, OPT_REG, OPT_REG | OPT
DEF_ASM_OP1(cmpxchg8b, 0x0fc7, 1, OPC_MODRM, OPT_EA )
/* pentium pro */
ALT(DEF_ASM_OP2(cmovo, 0x0f40, 0, OPC_MODRM | OPC_TEST, OPT_REG32 | OPT_EA, OPT_REG32))
ALT(DEF_ASM_OP2(cmovo, 0x0f40, 0, OPC_MODRM | OPC_TEST, OPT_REG32 | OPT_EA, OPT_REG32))
#ifdef I386_ASM_16
ALT(DEF_ASM_OP2(cmovno, 0x0f41, 0, OPC_MODRM | OPC_TEST, OPT_REG32 | OPT_EA, OPT_REG32))
ALT(DEF_ASM_OP2(cmovc, 0x0f42, 0, OPC_MODRM | OPC_TEST, OPT_REG32 | OPT_EA, OPT_REG32))
ALT(DEF_ASM_OP2(cmovnc, 0x0f43, 0, OPC_MODRM | OPC_TEST, OPT_REG32 | OPT_EA, OPT_REG32))
@ -377,7 +385,7 @@ ALT(DEF_ASM_OP2(cmovz, 0x0f44, 0, OPC_MODRM | OPC_TEST, OPT_REG32 | OPT_EA, OPT_
ALT(DEF_ASM_OP2(cmovnz, 0x0f45, 0, OPC_MODRM | OPC_TEST, OPT_REG32 | OPT_EA, OPT_REG32))
ALT(DEF_ASM_OP2(cmovna, 0x0f46, 0, OPC_MODRM | OPC_TEST, OPT_REG32 | OPT_EA, OPT_REG32))
ALT(DEF_ASM_OP2(cmova, 0x0f47, 0, OPC_MODRM | OPC_TEST, OPT_REG32 | OPT_EA, OPT_REG32))
#endif
DEF_ASM_OP2(fcmovb, 0xdac0, 0, OPC_REG, OPT_ST, OPT_ST0 )
DEF_ASM_OP2(fcmove, 0xdac8, 0, OPC_REG, OPT_ST, OPT_ST0 )
DEF_ASM_OP2(fcmovbe, 0xdad0, 0, OPC_REG, OPT_ST, OPT_ST0 )
@ -394,6 +402,7 @@ ALT(DEF_ASM_OP2(cmova, 0x0f47, 0, OPC_MODRM | OPC_TEST, OPT_REG32 | OPT_EA, OPT_
/* mmx */
DEF_ASM_OP0(emms, 0x0f77) /* must be last OP0 */
DEF_ASM_OP2(movd, 0x0f6e, 0, OPC_MODRM, OPT_EA | OPT_REG32, OPT_MMX )
ALT(DEF_ASM_OP2(movd, 0x0f7e, 0, OPC_MODRM, OPT_MMX, OPT_EA | OPT_REG32 ))
DEF_ASM_OP2(movq, 0x0f6f, 0, OPC_MODRM, OPT_EA | OPT_MMX, OPT_MMX )

13
i386-gen.c

@ -109,6 +109,12 @@ void o(unsigned int c)
}
}
void gen_le16(int v)
{
g(v);
g(v >> 8);
}
void gen_le32(int c)
{
g(c);
@ -161,6 +167,13 @@ static void gen_addr32(int r, Sym *sym, int c)
gen_le32(c);
}
static void gen_addrpc32(int r, Sym *sym, int c)
{
if (r & VT_SYM)
greloc(cur_text_section, sym, ind, R_386_PC32);
gen_le32(c - 4);
}
/* generate a modrm reference. 'op_reg' contains the addtionnal 3
opcode bits */
static void gen_modrm(int op_reg, int r, Sym *sym, int c)

135
i386-tok.h

@ -1,5 +1,7 @@
/* ------------------------------------------------------------------ */
/* WARNING: relative order of tokens is important. */
/* register */
DEF_ASM(al)
DEF_ASM(cl)
DEF_ASM(dl)
@ -24,6 +26,16 @@
DEF_ASM(ebp)
DEF_ASM(esi)
DEF_ASM(edi)
#ifdef TCC_TARGET_X86_64
DEF_ASM(rax)
DEF_ASM(rcx)
DEF_ASM(rdx)
DEF_ASM(rbx)
DEF_ASM(rsp)
DEF_ASM(rbp)
DEF_ASM(rsi)
DEF_ASM(rdi)
#endif
DEF_ASM(mm0)
DEF_ASM(mm1)
DEF_ASM(mm2)
@ -80,39 +92,39 @@
DEF_ASM(gs)
DEF_ASM(st)
DEF_BWL(mov)
/* generic two operands */
DEF_BWL(add)
DEF_BWL(or)
DEF_BWL(adc)
DEF_BWL(sbb)
DEF_BWL(and)
DEF_BWL(sub)
DEF_BWL(xor)
DEF_BWL(cmp)
DEF_BWLX(mov)
DEF_BWLX(add)
DEF_BWLX(or)
DEF_BWLX(adc)
DEF_BWLX(sbb)
DEF_BWLX(and)
DEF_BWLX(sub)
DEF_BWLX(xor)
DEF_BWLX(cmp)
/* unary ops */
DEF_BWL(inc)
DEF_BWL(dec)
DEF_BWL(not)
DEF_BWL(neg)
DEF_BWL(mul)
DEF_BWL(imul)
DEF_BWL(div)
DEF_BWL(idiv)
DEF_BWL(xchg)
DEF_BWL(test)
DEF_BWLX(inc)
DEF_BWLX(dec)
DEF_BWLX(not)
DEF_BWLX(neg)
DEF_BWLX(mul)
DEF_BWLX(imul)
DEF_BWLX(div)
DEF_BWLX(idiv)
DEF_BWLX(xchg)
DEF_BWLX(test)
/* shifts */
DEF_BWL(rol)
DEF_BWL(ror)
DEF_BWL(rcl)
DEF_BWL(rcr)
DEF_BWL(shl)
DEF_BWL(shr)
DEF_BWL(sar)
DEF_BWLX(rol)
DEF_BWLX(ror)
DEF_BWLX(rcl)
DEF_BWLX(rcr)
DEF_BWLX(shl)
DEF_BWLX(shr)
DEF_BWLX(sar)
DEF_ASM(shldw)
DEF_ASM(shldl)
@ -123,21 +135,31 @@
DEF_ASM(pushw)
DEF_ASM(pushl)
#ifdef TCC_TARGET_X86_64
DEF_ASM(pushq)
#endif
DEF_ASM(push)
DEF_ASM(popw)
DEF_ASM(popl)
#ifdef TCC_TARGET_X86_64
DEF_ASM(popq)
#endif
DEF_ASM(pop)
DEF_BWL(in)
DEF_BWL(out)
DEF_WL(movzb)
DEF_ASM(movzwl)
DEF_ASM(movsbw)
DEF_ASM(movsbl)
DEF_ASM(movswl)
#ifdef TCC_TARGET_X86_64
DEF_ASM(movslq)
#endif
DEF_WL(lea)
DEF_WLX(lea)
DEF_ASM(les)
DEF_ASM(lds)
@ -155,14 +177,14 @@
DEF_ASMTEST(set)
DEF_ASMTEST(cmov)
DEF_WL(bsf)
DEF_WL(bsr)
DEF_WL(bt)
DEF_WL(bts)
DEF_WL(btr)
DEF_WL(btc)
DEF_WLX(bsf)
DEF_WLX(bsr)
DEF_WLX(bt)
DEF_WLX(bts)
DEF_WLX(btr)
DEF_WLX(btc)
DEF_WL(lsl)
DEF_WLX(lsl)
/* generic FP ops */
DEF_FP(add)
@ -178,32 +200,35 @@
DEF_FP(div)
DEF_FP(divr)
DEF_BWL(xadd)
DEF_BWL(cmpxchg)
DEF_BWLX(xadd)
DEF_BWLX(cmpxchg)
/* string ops */
DEF_BWL(cmps)
DEF_BWL(scmp)
DEF_BWLX(cmps)
DEF_BWLX(scmp)
DEF_BWL(ins)
DEF_BWL(outs)
DEF_BWL(lods)
DEF_BWL(slod)
DEF_BWL(movs)
DEF_BWL(smov)
DEF_BWL(scas)
DEF_BWL(ssca)
DEF_BWL(stos)
DEF_BWL(ssto)
DEF_BWLX(lods)
DEF_BWLX(slod)
DEF_BWLX(movs)
DEF_BWLX(smov)
DEF_BWLX(scas)
DEF_BWLX(ssca)
DEF_BWLX(stos)
DEF_BWLX(ssto)
/* generic asm ops */
#define ALT(x)
#define DEF_ASM_OP0(name, opcode) DEF_ASM(name)
#define DEF_ASM_OP0L(name, opcode, group, instr_type)
#define DEF_ASM_OP1(name, opcode, group, instr_type, op0)
#define DEF_ASM_OP2(name, opcode, group, instr_type, op0, op1)
#define DEF_ASM_OP3(name, opcode, group, instr_type, op0, op1, op2)
#include "i386-asm.h"
#ifdef TCC_TARGET_X86_64
# include "x86_64-asm.h"
#else
# include "i386-asm.h"
#endif
#define ALT(x)
#define DEF_ASM_OP0(name, opcode)
@ -211,4 +236,8 @@
#define DEF_ASM_OP1(name, opcode, group, instr_type, op0) DEF_ASM(name)
#define DEF_ASM_OP2(name, opcode, group, instr_type, op0, op1) DEF_ASM(name)
#define DEF_ASM_OP3(name, opcode, group, instr_type, op0, op1, op2) DEF_ASM(name)
#include "i386-asm.h"
#ifdef TCC_TARGET_X86_64
# include "x86_64-asm.h"
#else
# include "i386-asm.h"
#endif

16
libtcc.c

@ -325,14 +325,10 @@ static inline int toup(int c)
#ifdef CONFIG_TCC_ASM
#ifdef TCC_TARGET_I386
#if defined TCC_TARGET_I386 || defined TCC_TARGET_X86_64
#include "i386-asm.c"
#endif
#ifdef TCC_TARGET_X86_64
#include "x86_64-asm.c"
#endif
#include "tccasm.c"
#else
static void asm_instr(void)
@ -854,10 +850,14 @@ static void put_extern_sym(Sym *sym, Section *section,
/* add a new relocation entry to symbol 'sym' in section 's' */
static void greloc(Section *s, Sym *sym, unsigned long offset, int type)
{
if (!sym->c)
put_extern_sym(sym, NULL, 0, 0);
int c = 0;
if (sym) {
if (0 == sym->c)
put_extern_sym(sym, NULL, 0, 0);
c = sym->c;
}
/* now we can add ELF relocation info */
put_elf_reloc(symtab_section, s, offset, type, sym->c);
put_elf_reloc(symtab_section, s, offset, type, c);
}
static void strcat_vprintf(char *buf, int buf_size, const char *fmt, va_list ap)

24
tcc.h

@ -660,35 +660,41 @@ struct TCCState {
/* all identificators and strings have token above that */
#define TOK_IDENT 256
/* only used for i386 asm opcodes definitions */
#define DEF_ASM(x) DEF(TOK_ASM_ ## x, #x)
#define TOK_ASM_int TOK_INT
#if defined TCC_TARGET_I386 || defined TCC_TARGET_X86_64
/* only used for i386 asm opcodes definitions */
#define DEF_BWL(x) \
DEF(TOK_ASM_ ## x ## b, #x "b") \
DEF(TOK_ASM_ ## x ## w, #x "w") \
DEF(TOK_ASM_ ## x ## l, #x "l") \
DEF(TOK_ASM_ ## x, #x)
#define DEF_WL(x) \
DEF(TOK_ASM_ ## x ## w, #x "w") \
DEF(TOK_ASM_ ## x ## l, #x "l") \
DEF(TOK_ASM_ ## x, #x)
#ifdef TCC_TARGET_X86_64
#define DEF_BWLQ(x) \
# define DEF_BWLQ(x) \
DEF(TOK_ASM_ ## x ## b, #x "b") \
DEF(TOK_ASM_ ## x ## w, #x "w") \
DEF(TOK_ASM_ ## x ## l, #x "l") \
DEF(TOK_ASM_ ## x ## q, #x "q") \
DEF(TOK_ASM_ ## x, #x)
#define DEF_WLQ(x) \
# define DEF_WLQ(x) \
DEF(TOK_ASM_ ## x ## w, #x "w") \
DEF(TOK_ASM_ ## x ## l, #x "l") \
DEF(TOK_ASM_ ## x ## q, #x "q") \
DEF(TOK_ASM_ ## x, #x)
# define DEF_BWLX DEF_BWLQ
# define DEF_WLX DEF_WLQ
/* number of sizes + 1 */
# define NBWLX 5
#else
# define DEF_BWLX DEF_BWL
# define DEF_WLX DEF_WL
/* number of sizes + 1 */
# define NBWLX 4
#endif
#define DEF_FP1(x) \
@ -734,7 +740,7 @@ struct TCCState {
DEF_ASM(x ## nle) \
DEF_ASM(x ## g)
#define TOK_ASM_int TOK_INT
#endif // defined TCC_TARGET_I386 || defined TCC_TARGET_X86_64
enum tcc_token {
TOK_LAST = TOK_IDENT - 1,

6
tcctok.h

@ -233,7 +233,6 @@
#endif
/* Tiny Assembler */
DEF_ASM(byte)
DEF_ASM(word)
DEF_ASM(align)
@ -258,9 +257,6 @@
DEF_ASM(code64)
#endif
#ifdef TCC_TARGET_I386
#if defined TCC_TARGET_I386 || defined TCC_TARGET_X86_64
#include "i386-tok.h"
#elif TCC_TARGET_X86_64
#include "x86_64-tok.h"
#endif

16
win32/build-tcc.bat

@ -3,8 +3,6 @@
@rem ----------------------------------------------------
@set PROMPT=$G$S
copy ..\include\*.h include
echo>..\config.h #define TCC_VERSION "0.9.25"
echo>>..\config.h #define TCC_TARGET_PE 1
echo>>..\config.h #define CONFIG_TCCDIR "."
@ -27,7 +25,6 @@ echo>>..\config.h #define TCC_TARGET_X86_64 1
:libtcc
if not exist libtcc\nul mkdir libtcc
copy ..\libtcc.h libtcc\libtcc.h
%P%gcc -Os -fno-strict-aliasing ../libtcc.c -c -o libtcc.o
%P%ar rcs libtcc/libtcc.a libtcc.o
@ -35,24 +32,13 @@ copy ..\libtcc.h libtcc\libtcc.h
%P%gcc -Os -fno-strict-aliasing ../tcc.c -o tcc.exe -s -DTCC_USE_LIBTCC -ltcc -Llibtcc
:libtcc1.a
copy ..\include\*.h include
.\tcc -c lib/crt1.c
.\tcc -c lib/wincrt1.c
.\tcc -c lib/dllcrt1.c
.\tcc -c lib/dllmain.c
.\tcc -c ../lib/libtcc1.c
@rem if not x%P%==x goto use_yasm
.\tcc -c lib/chkstk.S
.\tcc -c ../lib/alloca86%S%.S
tiny_libmaker lib/libtcc1.a crt1.o wincrt1.o dllcrt1.o dllmain.o chkstk.o libtcc1.o alloca86%S%.o
@goto cleanup
:use_yasm
.\tcc -o tmp.s -E lib/chkstk.S
yasm -p gnu -f elf64 -o chkstk.o tmp.s
.\tcc -o tmp.s -E ../lib/alloca86_64.S
yasm -p gnu -f elf64 -o alloca86_64.o tmp.s
del tmp.s
tiny_libmaker lib/libtcc1.a crt1.o wincrt1.o dllcrt1.o dllmain.o chkstk.o libtcc1.o alloca86_64.o
:cleanup
del *.o

1266
x86_64-asm.c

File diff suppressed because it is too large

15
x86_64-gen.c

@ -123,6 +123,12 @@ void o(unsigned int c)
}
}
void gen_le16(int v)
{
g(v);
g(v >> 8);
}
void gen_le32(int c)
{
g(c);
@ -192,7 +198,13 @@ static int oad(int c, int s)
return s;
}
#if 0
static void gen_addr32(int r, Sym *sym, int c)
{
if (r & VT_SYM)
greloc(cur_text_section, sym, ind, R_X86_64_32);
gen_le32(c);
}
/* output constant with relocation if 'r & VT_SYM' is true */
static void gen_addr64(int r, Sym *sym, int64_t c)
{
@ -200,7 +212,6 @@ static void gen_addr64(int r, Sym *sym, int64_t c)
greloc(cur_text_section, sym, ind, R_X86_64_64);
gen_le64(c);
}
#endif
/* output constant with relocation if 'r & VT_SYM' is true */
static void gen_addrpc32(int r, Sym *sym, int c)

225
x86_64-tok.h

@ -1,225 +0,0 @@
/* WARNING: relative order of tokens is important. */
DEF_ASM(al)
DEF_ASM(cl)
DEF_ASM(dl)
DEF_ASM(bl)
DEF_ASM(ah)
DEF_ASM(ch)
DEF_ASM(dh)
DEF_ASM(bh)
DEF_ASM(ax)
DEF_ASM(cx)
DEF_ASM(dx)
DEF_ASM(bx)
DEF_ASM(sp)
DEF_ASM(bp)
DEF_ASM(si)
DEF_ASM(di)
DEF_ASM(eax)
DEF_ASM(ecx)
DEF_ASM(edx)
DEF_ASM(ebx)
DEF_ASM(esp)
DEF_ASM(ebp)
DEF_ASM(esi)
DEF_ASM(edi)
DEF_ASM(rax)
DEF_ASM(rcx)
DEF_ASM(rdx)
DEF_ASM(rbx)
DEF_ASM(rsp)
DEF_ASM(rbp)
DEF_ASM(rsi)
DEF_ASM(rdi)
DEF_ASM(mm0)
DEF_ASM(mm1)
DEF_ASM(mm2)
DEF_ASM(mm3)
DEF_ASM(mm4)
DEF_ASM(mm5)
DEF_ASM(mm6)
DEF_ASM(mm7)
DEF_ASM(xmm0)
DEF_ASM(xmm1)
DEF_ASM(xmm2)
DEF_ASM(xmm3)
DEF_ASM(xmm4)
DEF_ASM(xmm5)
DEF_ASM(xmm6)
DEF_ASM(xmm7)
DEF_ASM(cr0)
DEF_ASM(cr1)
DEF_ASM(cr2)
DEF_ASM(cr3)
DEF_ASM(cr4)
DEF_ASM(cr5)
DEF_ASM(cr6)
DEF_ASM(cr7)
DEF_ASM(tr0)
DEF_ASM(tr1)
DEF_ASM(tr2)
DEF_ASM(tr3)
DEF_ASM(tr4)
DEF_ASM(tr5)
DEF_ASM(tr6)
DEF_ASM(tr7)
DEF_ASM(db0)
DEF_ASM(db1)
DEF_ASM(db2)
DEF_ASM(db3)
DEF_ASM(db4)
DEF_ASM(db5)
DEF_ASM(db6)
DEF_ASM(db7)
DEF_ASM(dr0)
DEF_ASM(dr1)
DEF_ASM(dr2)
DEF_ASM(dr3)
DEF_ASM(dr4)
DEF_ASM(dr5)
DEF_ASM(dr6)
DEF_ASM(dr7)
DEF_ASM(es)
DEF_ASM(cs)
DEF_ASM(ss)
DEF_ASM(ds)
DEF_ASM(fs)
DEF_ASM(gs)
DEF_ASM(st)
DEF_BWLQ(mov)
/* generic two operands */
DEF_BWLQ(add)
DEF_BWLQ(or)
DEF_BWLQ(adc)
DEF_BWLQ(sbb)
DEF_BWLQ(and)
DEF_BWLQ(sub)
DEF_BWLQ(xor)
DEF_BWLQ(cmp)
/* unary ops */
DEF_BWLQ(inc)
DEF_BWLQ(dec)
DEF_BWLQ(not)
DEF_BWLQ(neg)
DEF_BWLQ(mul)
DEF_BWLQ(imul)
DEF_BWLQ(div)
DEF_BWLQ(idiv)
DEF_BWLQ(xchg)
DEF_BWLQ(test)
/* shifts */
DEF_BWLQ(rol)
DEF_BWLQ(ror)
DEF_BWLQ(rcl)
DEF_BWLQ(rcr)
DEF_BWLQ(shl)
DEF_BWLQ(shr)
DEF_BWLQ(sar)
DEF_ASM(shldw)
DEF_ASM(shldl)
DEF_ASM(shld)
DEF_ASM(shrdw)
DEF_ASM(shrdl)
DEF_ASM(shrd)
DEF_ASM(pushw)
DEF_ASM(pushl)
DEF_ASM(pushq)
DEF_ASM(push)
DEF_ASM(popw)
DEF_ASM(popl)
DEF_ASM(popq)
DEF_ASM(pop)
DEF_BWL(in)
DEF_BWL(out)
DEF_WL(movzb)
DEF_ASM(movzwl)
DEF_ASM(movsbw)
DEF_ASM(movsbl)
DEF_ASM(movswl)
DEF_ASM(movslq)
DEF_WLQ(lea)
DEF_ASM(les)
DEF_ASM(lds)
DEF_ASM(lss)
DEF_ASM(lfs)
DEF_ASM(lgs)
DEF_ASM(call)
DEF_ASM(jmp)
DEF_ASM(lcall)
DEF_ASM(ljmp)
DEF_ASMTEST(j)
DEF_ASMTEST(set)
DEF_ASMTEST(cmov)
DEF_WLQ(bsf)
DEF_WLQ(bsr)
DEF_WLQ(bt)
DEF_WLQ(bts)
DEF_WLQ(btr)
DEF_WLQ(btc)
DEF_WLQ(lsl)
/* generic FP ops */
DEF_FP(add)
DEF_FP(mul)
DEF_ASM(fcom)
DEF_ASM(fcom_1) /* non existant op, just to have a regular table */
DEF_FP1(com)
DEF_FP(comp)
DEF_FP(sub)
DEF_FP(subr)
DEF_FP(div)
DEF_FP(divr)
DEF_BWLQ(xadd)
DEF_BWLQ(cmpxchg)
/* string ops */
DEF_BWLQ(cmps)
DEF_BWLQ(scmp)
DEF_BWL(ins)
DEF_BWL(outs)
DEF_BWLQ(lods)
DEF_BWLQ(slod)
DEF_BWLQ(movs)
DEF_BWLQ(smov)
DEF_BWLQ(scas)
DEF_BWLQ(ssca)
DEF_BWLQ(stos)
DEF_BWLQ(ssto)
/* generic asm ops */
#define ALT(x)
#define DEF_ASM_OP0(name, opcode) DEF_ASM(name)
#define DEF_ASM_OP0L(name, opcode, group, instr_type)
#define DEF_ASM_OP1(name, opcode, group, instr_type, op0)
#define DEF_ASM_OP2(name, opcode, group, instr_type, op0, op1)
#define DEF_ASM_OP3(name, opcode, group, instr_type, op0, op1, op2)
#include "x86_64-asm.h"
#define ALT(x)
#define DEF_ASM_OP0(name, opcode)
#define DEF_ASM_OP0L(name, opcode, group, instr_type) DEF_ASM(name)
#define DEF_ASM_OP1(name, opcode, group, instr_type, op0) DEF_ASM(name)
#define DEF_ASM_OP2(name, opcode, group, instr_type, op0, op1) DEF_ASM(name)
#define DEF_ASM_OP3(name, opcode, group, instr_type, op0, op1, op2) DEF_ASM(name)
#include "x86_64-asm.h"
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